Wireless communication devices, for example those operating in a cellular telephone system such as the Global System for Mobile communications (GSM), use a broadcast reference frequency signal, for example a Frequency Correction Channel (FCCH), to calibrate their operating (transmit/receive) frequency. The broadcast signal is generally transmit from one or more base transceiver stations (BTSs). The wireless communication devices use the frequency correction signal to synchronise their internal frequency generation circuits to a centralised timing system. The units synchronise their operating frequency to match the system frequency, prior to entering into a communication.
There are many known techniques for synthesizing modulated signals onto frequencies for transmission. A popular technique at present is one that uses a fractional division synthesizer, which enables a wide range of discrete frequencies to be tuned to by appropriate selection of ‘division’ parameters applied to a reference oscillator.
The 3rd Generation Partnership Project 3GPP (previously standardised by European Telecommunication Standards Institute (ETSI)) has defined a frequency accuracy for digital cellular telecommunications, with one specification for the Global System for Mobile Communications (GSM) being defined in ‘Radio Transmission and Reception for Digital Cellular Telecommunication System in 3GPP TS 05.05’. This standard also specifies operating frequencies for Quad band enhanced general packet radio system (EGPRS) transceivers that cover low band GSM850, enhanced GSM (EGSM) and high band DCS1800 and PCS1900 frequencies.
The standard specifies that enhanced GSM transmitters (Tx) and receiver (Rx) local oscillators (LO) need to have very accurate frequencies, with a frequency error of better than 0.1 ppm (parts per million). Thus, for example, the oscillator error has to be less than 90 Hz on a 900 MHz GSM carrier frequency and 180 Hz on an 1800 MHz GSM carrier. Errors in the Tx and Rx LO frequencies are a function of the reference frequency of the crystal or the Voltage Temperature compensated Crystal Oscillator (VTCXO) reference used in the phase locked loop (PLL) circuits for generating these frequencies. The frequencies of these devices vary as a function of temperature supply voltage to the oscillator circuits, as well as due to ageing of the devices.
Such accurate frequencies can be generated in current wireless communication units primarily by one of two methods:                (i) A voltage, temperature-controlled crystal oscillator (VTCXO). The accuracy of a VTCXO has a typical free running tolerance of the order of 2 ppm. These circuits need a digital-to-analogue converter (DAC) to ‘adjust’ the final frequency accuracy; and        (ii) Typical free-running crystal units, which have a frequency tolerance of the order of 30 ppm. This is three hundred times the tolerance required by the transmitter. However, the improved frequency accuracy, in order to meet the 3GPP standard's requirements, is typically achieved by adjusting a divider feedback ratio in a fractional-‘N’ phase locked loop (PLL). Unfortunately, this involves calculating a new synthesiser feedback ratio for every single PLL frequency.        
A VTCXO implementation costs approximately three times that of an XTAL-based implementation. Hence, with the manufacturing cost of wireless communication devices being a key factor in achieving success in such a mass-market field, use of an XTAL-based solution is highly desirable.
With a free-running XTAL-based implementation, calculating a new feedback ratio for every frequency channel is needed, and this requires a complex software algorithm. Automatic frequency control (AFC) circuitry is also needed, whereby an AFC value needs to be updated every time a new frequency is selected, or at least every time that a new AFC calculation is performed. In contrast, the VTCXO system only needs updating once a new frequency error is calculated.
A fractional ‘N’ based frequency generation approach is described in PCT Patent Application: WO97/28606 A1, by Motorola, Daniel et al., titled “Method and apparatus for controlling a fractional-n synthesiser in a time division multiple access system”. This patent application describes a method for controlling a fractional-N synthesizer in a time division multiple access system by receiving timeslot and frequency information and determining a potential offset value from a look-up table based on the timeslot and the frequency information. The microprocessor then utilizes the potential offset value, the current timeslot and the current operating frequency to determine the offset to be applied to the divider control circuit of the fractional-N synthesizer. However, the patent application does not describe how the offsets in the look-up table are generated or how the offsets (fractional values) are related to the reference frequency or the frequency step of the voltage-controlled oscillator.
An alternative approach is described in PCT patent application; WO95/12253, by Motorola Inc., and Alex Hietala and Duane Rabe, titled “Automatic Frequency control apparatus”, for a digital AFC system where the AFC is applied to the Feedback divider of a fractional-n synthesiser. Here, an AFC word has to be calculated and sent to the Synthesiser for each new frequency.
Thus, a need has arisen to provide a wireless communication device, an application specific integrated circuit and a method of generating a frequency signal, wherein the aforementioned disadvantages may at least be alleviated.